How to Make Ernie : 11 Steps - longdesiblesen

Introduction: How to Make Ernie

This is a tutorial on how to build Ernie, your autonomous sound undermentioned robot, using a Zybo Board. Information technology will cover how to: create a contrive in Vivado, make up PWM-like-minded servo motor drivers in the the FPGA, port with two sound sensors, create a time difference of arrival IP, use freeRTOS, and run the zybo off a battery pack. This was our final project for a Realistic Meter Operative Systems class (CPE 439) at Cal Poly SLO.

Equipment list:

• 1 - ZYBO Zynq 7000 Development Board
• 2 - Parallax Free burning Revolution Servo
• 2 - Sound Sensor (SparkFun Sound Detector)
• 1 - 5v Lithium Ion USB battery pack (for board)
• 4 - AA batteries (for servos)
• 1 - AA barrage fire pack (w/ 4 battery slots)
• 1 - Micro USB cable
• 1 - Bread board
• numerous - Masculine to Manlike Wires
• 1 - Servosystem chassis

Software requirements:

• Xilinx Vivado Designing Suite 2022.2
• Digilent Adept 2.16.1

Step 1: Setting Finished a Project in Vivado for Ernie

1. A wizard will pop up
2. Click Succeeding
3. Next name the throw
   1. Never use of goods and services a project figure or directory path that has spaces in information technology!!!!!
   2. This will be an RTL project.
4. We do non want to specify sources
5. Clicking Next, we get to the Part pageboy. We are using a ZYNQ XC7Z010-1CLG400C.
   1. Vivado doesn't get the Zybo listed as one of it's pre-defined boards. Choice: "parts" then search for xc7z010clg400-1.
   2. If you take the wrong part past slip you throne well substitution chips: Tools -> Project Settings -> Common and click the dots to the right of "Project Device"
6. Click Create Block Design.
   1. Name it design_1 for now
7. You leave see a putting green bar that says Add IP, click IT.
8. Search for Zynq.
   1. Double click ZYNQ7 Processing System,
   2. This block will appear in our block design.
9. You wish see a green barricade that says Run for Block Automation, dawn it.
10. Download zybo_zynq_def.xml to a lower place.
11. In Vivado, fall into place "Import XPS Settings" and select "zybo_zynq_def.xml"
    1. This pre populates the Vivado block contour with whol of Zybo board's intrinsic peripherals and pin assignments.
12. Double cluck on the ZYNQ block.
    1. MIO Configuration
       1. Enable Timekeeper 0 (below Application Processor Building block - img 1)
       2. Enable Watchdog (under Application program Central processing unit Unit- img 1)
       3. Enable GPIO->GPIO MIO (under Application Processor Unit - img 2)
       4. Enable GPIO->ENET Readjust (under I/O Peripherals- img 2)
    2. Clock Configuration
       1. Disable FCLK0 (under PL Fabric Clocks - img 3)
13. Suction stop Ok.
14. "Run Immobilise Automation" now.
    1. In that respect will be some questions about signals, say Alright
15. Click "Render High-density lipoprotein Wrapper".
    1. We will want to copy the generated wrapper to allow substance abuser edits.
16. Click OK.

Step 2: Creating Ernie's PWM in Vivado

This step wish generate a PWM IP with inputs sent via the AXI library.

1. Produce AXI GPIO block aside right-clicking the background, and clicking "add IP"
   1. typewrite "AXI_GPIO" into the search bar, and select this package
2. Rhenium-customize IP by double-clicking the newborn axi_gpio_0 ba
   1. under GPIO, set GPIO breadth to 2. These bits will be the PWM_ON signaling to drive each PWM faculty illustrate.
   2. dog "enable dual channel"
   3. under GPIO 2, set GPIO breadth to 2. These bits will be the PWM_FW signal to situated the direction of each PWM module case.
3. Right-minded click on the axi_gpio_0 output port labeled GPIO, and choose "Make External"
   1. Click happening the untested turnout labeled GPIO, and navigate to the "properties" tab on the left toolbar, and change the name to PWM_ON
   2. Click along the new output tagged GPIO2, and sail to the "properties" tab happening the left toolbar, and change the name to PWM_FW
4. Select Run Connecter Automation in the green banner above the stymy diagram.
   1. If you manually link up the ports, AXI addresses may not be configured, leading to communicating issues afterward
5. In the Flow rate Navigator Pane, select project director -> Add Sources to make up a new bespoken IP close u
   1. pick out "add or create design sources", and smasher side by side
   2. click "create file", change file type to "SystemVerilog", and type "pwm" into the file cabinet name field, then click Very well
   3. click Finish
   4. ignore the Delineate Module window away pressing All right (we will overwrite these subsequent)
      1. if it asks if you're sure, click Yes
6. In the sources tab, double-click the pwm.sv (located in "Design Sources/design_1_wrapper")
   1. Copy/paste the entire SystemVerilog code from the pwm.txt filing cabinet pledged downstairs

Abuse 3: Creating Ernie's TDOA in Vivado

This ill-use will render a TDOA Information science whose output rear end be learn via the AXI subroutine library

1. Create AXI GPIO immobilise away right-clicking the background, and clicking "ADHD IP"
   1. type "AXI_GPIO" into the seek bar, and select this computer software
2. Re-customize Information science past double-clicking the new axi_gpio_1 block
   1. under GPIO, check the "All Inputs" box, and placed GPIO width to 32. This double-decker volition be the clock time dispute of arrival between the two sensors.
   2. inside the axi_gpio_1 block, click the + incoming to the GPIO port to disclose gpio_io_i[31:0].
3. Ethical click on the axi_gpio_1 output port labeled gpio_io_i[31:0], and choose "Make External"
   1. Click on the new input labeled gpio_io_i[31:0], and navigate to the "properties" tab on the left toolbar, and switch the name to TDOA_val
4. Take Run Connection Automation in the green banner above the block diagram.
   1. If you manually connect the ports, AXI addresses may not be configured, leading to communication issues subsequently
5. In the Flow Navigator Window glass, superior project coach -> Add Sources to create a new custom Information processing embarras
   1. choose "hyperkinetic syndrome or create design sources", and rack up side by side
   2. click "create file", change single file typewrite to "SystemVerilog", and type "tdoa" into the file cabinet name field of operations, then click OK
   3. click Finish
   4. ignore the Define Faculty window by pressing OK (we volition overwrite these later)
      1. if it asks if you're sure, dawn Yes
6. In the sources tab, image-click the tdoa.sv (set in "Intent Sources/design_1_wrapper")
   1. Copy/paste the entire SystemVerilog code from the tdoa.txt file attached below

Step 4: Wrapping and Exporting Ernie

1. Verify that the block plot looks similar the screenshot attached
2. In the sources tab key, right-click design_1.bd and select "Create HDL Housecoat..."
   1. Select "Copy generated end product to allow exploiter edits", then press "OK"
   2. Copy the code from design_1_wrapper.txt attached below, and paste it in place of the generated design_1_wrapper.v code
   3. redeem design_1_wrapper.v
3. In the sources check, double-dog the ZYBO_Master.xdc data file under Constraints/constrs1
   1. Copy the computer code from ZYBO_Master.txt attached below, and paste it in come in of the existing ZYBO_Master.xdc code
   2. Note the chase input/output pins:
      1. L15: PWM betoken for the left motor (Pmod JA2 along the Zybo)
      2. L14: PWM signal for the right drive (Pmod JA8 on the Zybo)
      3. V12: gate input from auditory sensation sensor 1 (Pmod JE1 on the Zybo)
      4. K16: gate stimulant from sound sensor 2 (Pmod JE2 on the Zybo)
4. In the Flow Navigator Pane, Click "Bring fort Bitstream" under Platform and Debug
   1. if you think it's done right away, IT's probably not. earnestly, make some tea
5. Click File->Exportation->Generate Hardware
   1. Check "Include Bitstream" and hit OK
6. Click File out-> Launch SDK

Step 5: Edifice Ernie

1. Mount the servos to the servo chassis.
2. Following the datasheet for the servos, do the following:
   1. connect the background of the servos to ground pins on the Zybo's JA Pmod (see attached pinout image)
   2. connect the power pin of the servos to the Alcoholics Anonymous battery pack
      1. We found that when the servos are connected to the Zybo's Vdd, the board draws too much rife, causation the board to continuously reset.
   3. tie in the input signal pins to the Zybo's befitting output pins (left: JA2, right: JA8)
3. mount the healthy sensors to the front of the chassis, facing forward, keeping them arsenic close together as possible
4. use the undamaged sensor's hookup guide to integrate the sound sensors
   1. wire the soil and Vdd pins of each righteous sensor to the ground and Vdd pins on the Zybo's JE Pmod (see attached pinout image)
   2. wire the left sound sensor's Gate pin to JE1
   3. wire the right sound sensor's Gate personal identification number to JE2

Step 6: Ernie's First gear BSP

1. Create a BSP to wrap up the platform we just created.
   1. You buttocks get this through Charge -> Newborn -> Board Support Package.
2. A wizard wish pop busy help you create the BSP.
   1. We want to tie this BSP with our Platform that we rightful created, so
   2. Hardware Political program should production line up with the one we just created (see img 1)
   3. Our CPU will be the _0 CPU.
   4. Click Finish
   5. Be certain to tick lwip141 for inclusion with your bsp in the windowpane that pops up (see img 2)

Stair 7: FreeRTOS'ing Ernie

1. Download the latest FreeRTOS release from Sourceforge.
   1. If the download is an executable, run it to extract the FreeRTOS files into your send off directory.
2. Hold out that SDK open, and tick File out -> Consequence.
3. We want to click General->From an Extant Workspace, and then we testament want to sail to where we downloaded FreeRTOS.
4. Our demo bequeath be located in FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702. Upon selecting this brochure, we should see three projects nonclassical up (our cipher (OS), it's BSP, and the HW Program).
   1. Only if Import RTOSDemo into your current workspace.
5. On all "blue" pamphlet projects change the referenced BSP
   1. Right clicking and selecting "Change Documented BSP."
   2. Select the BSP you just created for your Zybo
   3. Code Editing in Xilinx's SDK Blue folders are the actual cipher projects.

Step 8: Importing Ernie's C Code

1. In the RTOSDemo/src directory, overwrite the existing chief.c with the main.c file attached Hera.
2. Copy the main_sound.c fiile into the RTOSDemo/src directory.

Step 9: Debugging Ernie

1. Select Run -> Debug Configurations
2. On the left pane produce a sunrise System Debugger run
3. In the Target Frame-up chit,
   1. select "Readjust Whole System" so that the both that and ps7_init are selected
4. Now select the Application tab.
   1. Superior "download application"
   2. Jell the cortexa9_0 core to "plosive speech sound at program entry"
   3. Pawl Apply and Debug.
5. Verify that there are no errors in the debugging process
6. Keeping a close-set watch on the robot, press the Curriculum vitae button until program runs without hit any breakpoints
7. The robot should now turn and move towards loud noises. Yay!

Step 10: Making Ernie Autonomous

1. Once your project is completely willing to go (you can run with no problems through the debugger) you are quick to load IT to the flash memory on your board.
2. Make up what is called the "first stage boot loader" (FSBL) externalize and contains altogether the instruction that your gameboard leave need in order to load your projection files (the bit stream and OS) on inauguration.
   1. Select: Filing cabinet->New->Application Project and the shadowing window should appear.
   2. Name it what you neediness (i.e. "FSBL")
   3. Ensure the hardware platform is the one you are functioning with
   4. Adjure next (Do not press Finish)
   5. Prime the Zynq FSBL guide
   6. Click finish.
3. Erstwhile the creation process is complete you will bon if everything worked if you visualize the following two new folders in the Project Internet Explorer window.
4. Create a Boot Image Now you leave need to create the Rush image.
   1. Straight dog on your project folder (therein event mine is called "RTOSDemo")
   2. Click "Create Boot prototype" from the drop go through
   3. If everything is linked correctly, the project will cognize what files it necessarily and the succeeding window will look as you see below (key being that you wealthy person 3 partitions under Boot image surgical incision, the bootloader, your bit file, and your projects .elf file).
      1. If this is non the eccentric there is possibly something wrong with your jut out linking. Insure that the project folders are linked to their respective BSPs
   4. Click the "Make Image" release
5. The last step to perform in software is to now flash your antecedently created mental image to the board's memory
   1. Select from the SDK's main puppet bar select Xilinx Tools->Program Flash Retentiveness
   2. Insure that the correct hardware platform is selected and that the ikon file path is correctly pointing to the .BIN filing cabinet created in the previous step.
   3. Select "qspi single" from the Flash type
   4. Check the "Avow after flash" to see to it the integrity but information technology is not needed
6. Configure Your Board Lastly you pauperization to insure that the boards programming mode jumper (JP5) is correctly set to superior to reboot from the qspi (which contains what you just flashed) when the BootROM is run.
7. Now simply power cycle the gimmick and insure the "Logic Configuration Done LED" (LED 10) is lit green.

Step 11: Making Ernie Cute

1. Fur
2. Lots of Fur
3. Queen-sized eyes!
4. ... top hat

Beryllium the First to Ploughshare

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Source: https://www.instructables.com/How-to-Make-Ernie/

Posted by: longdesiblesen.blogspot.com

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